In the prior art, amorphous silicon (a-Si) thin film transistors are formed by depositing a first layer of a-Si semiconductor material over a gate and gate insulator layer and then depositing a layer of highly doped silicon (e.g. n+ layer) on top of the first layer. Metal contacts for the source and drain are then formed on the highly doped layer defining a channel area in the first a-Si layer between the contacts. The highly doped layer over the channel area can then be etched away so as not to adversely affect the channel area. The low mobility in the a-Si TFT channel makes the device less demanding on contact resistance. The metal contacts formed on the highly doped area provide a low resistance (ohmic) contact.
In metal oxide thin film transistors (MOTFT) the source and drain metal contacts are formed directly on the metal oxide semiconductor layer. That is the metal oxide semiconductor material is the same under the source and drain metal contacts as it is in the channel area. For MOTFTs the lack of an n+ layer and a higher bandgap makes it harder to provide a good ohmic contact. Furthermore, the high mobility of the metal oxide semiconductor material demands a lower contact resistance than in a-Si TFTs. Without a good, low resistance contact, hereinafter referred to as an ohmic contact, the high mobility of the metal oxide semiconductor material can be masked by the contact resistance. However, ohmic contacts in MOTFTs have been virtually unknown to date or are very difficult to form and/or retain, especially with a simple and manufacturing-friendly method.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved source/drain to metal oxide semiconductor contacts in a MOTFT.
It is another object of the present invention to provide new and improved source/drain to metal oxide semiconductor contacts in a MOTFT that form low resistance ohmic contacts using a method which is relatively easy and inexpensive to implement during device fabrication.
It is also an object of the present invention to provide a process for fabricating a MOTFT from a uniform metal oxide semiconductor film of which portions in contact with the source/drain metal contacts have a carrier concentration greater than the carrier concentration in the channel area.
It is also an object of the present invention to provide an insulating, passivation layer shielding the MOTFT channel area, which passivation layer serves as a chemical barrier under TFT storage/operation conditions and during TFT fabrication process steps after the passivation layer. The as deposited passivation layer possesses sufficient mobility to oxygen at an elevated annealing temperature allowing turning carrier concentration and density of oxygen vacancy in the semiconductor channel area to desired ranges, and oxidizing the passivation layer to levels which resist to the chemicals experienced during the following deposition and etching process steps.
It is also an object of the present invention to provide an etch-stop/passivation layer over the metal-oxide semiconductor channel area, whose deposition process causes little or no damage to the underlying metal oxide semiconductor layer such that its carrier concentration is little changed after coating the etch stop passivation layer.
It is another object of the present invention to provide an insulating, passivation layer shielding the channel area, which passivation layer includes oxygen containing groups, and which serves as an oxygen source at annealing temperatures and serves as a chemical barrier at TFT storage/operation temperatures. When such passivation layer is positioned in between channel and source/drain electrodes, such passivation layer also function as an etch-stop during source/drain patterning stage.
It is another object of the present invention to provide an annealing process after which portions of the metal oxide semiconductor film not covered by the etch-stop/passivation layer exhibit a significant net loss of oxygen resulting in much higher carrier concentration than the portion of metal oxide semiconductor in the channel area which is covered by the etch stop/passivation layer, enabling low resistance ohmic contacts between source/drain electrodes and said portions of the metal oxide semiconductor film with much higher carrier concentration.